SIA Semiconductors

Frequently Asked Questions

Semiconductors are materials which have a conductivity between conductors (general metals) and nonconductors or insulators (such as ceramics). Semiconductors are made from pure elements, typically silicon or germanium, or compounds such as gallium arsenide. In a process called doping, small amounts of impurities are added to pure semiconductors causing large changes in the conductivity of the material.

Due to their role in the fabrication of electronic devices, semiconductors are an important part of our lives. Imagine life without electronic devices. There would be no radios, not TV's, no computers, no video games, and poor medical diagnostic equipment. Although many electronic devices could be made using vacuum tube technology, the developments in semiconductor technology during the past 50 years have made electronic devices smaller, faster, and more reliable. Think for a minute of all the encounters you have with electronic devices. How many have you seen or used in the last twenty-four hours? Each has important components that have been manufactured with electronic materials.

The process of manufacturing semiconductors or integrated circuits (commonly called ICs or chips) typically consists of hundreds of steps, during which hundreds of copies of an integrated circuit are formed on a single wafer.

Generally, the process involves the creation of 8 to 20, and frequently more, patterned layers on (and into) the wafer, ultimately forming the complete integrated circuit. This layering process creates (interconnected) electrically active regions on the semiconductor wafer surface.

Silicon Wafer Manufacturing

Semiconductor manufacturing begins with production of the wafer, i.e., a thin, round slice of a semiconductor material varying in size 6 inches to 12 inches in diameter. The finished wafer is approximately 15 mil thick. The materials are primarily silicon; however, gallium arsenide, silicon carbide, germanium and others undergo similar processes. Purified polycrystalline silicon is created from sand, one of the most abundant materials available on our planet, is heated to a molten liquid. In a process similar to repeatedly dipping a wick in wax to make a candle, a small piece of solid silicon (seed) is dipped in molten liquid. As the seed is slowly withdrawn (by mechanical means) from the melt, the liquid quickly cools to form a single crystal ingot.

This cylindrical crystal ingot is then ground to a uniform diameter. A diamond saw blade slices the ingot into thin wafers. The cut wafers are then processed through a series of machines where they are ground (optically) smooth and chemically polished.

The wafers are now ready to be sent to the wafer fabrication area fab,where they are used as the foundation for manufacturing integrated circuits (ICs).

Wafer Fab Manufacturing

The heart of any semiconductor manufacturing business is the fab,where the integrated circuit is formed on the wafer. The fabrication process, which takes place in an environmentally controlled clean room, involves a series of principle repetitive steps described below. Typically, it takes from 10-30 days, and frequently much longer, to complete the fabrication process.

Thermal Oxidation--Wafers are pre-cleaned using high-purity deionized water and various low-particulate chemicals, a must for high-yield production. The silicon wafers are heated to approximately 1000 C and exposed to ultra-pure oxygen in the oxidation furnace. Under carefully controlled conditions, a silicon dioxide insulator film of uniform thickness is formed on the surface of the wafer.

Patterning--Masking is used to protect one area of the wafer while working on another. This process is referred to as photolithography. A photo resist, light-sensitive film is spin coated onto the wafer, giving it characteristics similar to a photographic film. A (micro) aligner aligns the wafer to a glass mask and then projects an intense ultraviolet light through the mask, exposing the photo resist with the mask pattern, thereby transferring the image from the mask into the light-sensitive film.

Etching--The wafer image is then developed (like a photo negative). The exposed photo resist is chemically removed and baked to harden the remaining photo resist pattern, which now is no longer light sensitive. It is then exposed to a chemical wet solution or plasma (gas discharge) so that areas not covered by the hardened photo resist are etched away. The remaining photo resist is now removed using either wet or plasma chemistry. The wafer is optically inspected to assure that the image transfer from the mask to the top silicon layer is correct, and then goes on to the next step.

Doping/Diffusion--Atoms with one less electron than silicon (such as boron) or one more electron than silicon (such as phosphorus) are introduced into the area exposed by the etch process, to alter the electrical character (conductivity) of the silicon. These areas are called P type or N type, respectively, which reflects their conducting characteristics.

Repeating the Above Steps--The thermal oxidation, masking, etching and doping steps are repeated many times until the last "front end" layer is completed (all active devices have been formed).

Dielectric Deposition and Metallization--Following completion of the "front end," the individual devices are interconnected "backend" (like on a PC board) using a series of alternating metal depositions, dielectric films, with their respective patterning. Current semiconductor fabrication includes as many as 5 to 7 metal layers for logic, and fewer for memory, separated by dielectric layers (insulators).

Passivation--After the last metal is patterned, a final insulating layer (passivation) is deposited to protect the circuit from damage and contamination. Openings are etched in this film to allow access to the top metal later by electrical probes and subsequent wire bonds.

Electrical Test--An automatic, computer-driven test system checks for functionality of each chip on the wafer. Chips that do not pass the test are marked for automatic rejection. For simpler devices a mechanical probe is used.

Assembly--A diamond saw slices the wafer into single chips. Sizes can vary from 1 x 1 mm to 10 x 10 mm. The rejected chips are discarded and the remaining chips are visually inspected under a high-power microscope before packaging.

Each chip is then assembled into an appropriate package that provides the contact leads for the chip. In one type of interconnect a wire bonding machine attaches wires, a fraction of the width of a human hair, to the leads of the package. The packaged chip is tested again prior to delivery to the customer. Alternative, the chip can be assembled in a ceramic package for certain high performance applications.

Source: www.elume.com

A 300mm wafer is 12 inches in diameter. When using a chip that is 1 square centimeter, a 300mm wafer includes approximately 706 chips. The 300mm wafer has 2.25 times the wafer area than a 200mm wafer or 8 inches,  a higher clean room utilization efficiency, and a reduced defect density that will lower die cost. It's also much cheaper to manufacture.

Terms of Measurement:

Micron: A micron is a metric unit of linear measure, which equals one-millionth of a meter. The diameter of a human hair is about 100 microns. Today's semiconductors have line etched at 0.048 microns.

Nanometer: A nanometer is a metric unit of linear measure, which equals one-billionth of a meter. The semiconductor industry is now using nanometer as opposed to "microns" because the conversion is easier as it eliminates the need for decimals. For example, .13 microns is equal to 130 nanometers.

What is Moore's Law?

Gordon Moore made his famous observation in 1965, just four years after the first planar integrated circuit was discovered. The press called it "Moore's Law" and the name has stuck. In his original paper, Moore observed an exponential growth in the number of transistors per integrated circuit and predicted that this trend would continue.

How does the SIA further Moore's Law?

Starting with the work of Gordon Moore, the SIA chairs a process leading to the International Technology Roadmap for Semiconductors (ITRS), a document that is updated and released every two years. It is an assessment of the semiconductor technology requirements to follow Moore's Law. The objective of the ITRS is to ensure advancements in the performance of integrated circuits. This assessment, called roadmapping, is a cooperative effort of the global industry manufacturers and suppliers, government organizations, consortia, and universities.

Commencing in 1992 as a U.S. lead effort the ITRS is now an international document, sponsored by the Semiconductor Industry Association (SIA), the European Electronic Component Association (EECA), the Japan Electronics & Information Technology Industries Association (JEITA), the Korean Semiconductor Industry Association (KSIA), and the Taiwan Semiconductor Industry Association (TSIA).

Who is Gordon Moore?

Gordon E. Moore is currently Chairman Emeritus of Intel Corporation. Moore co-founded Intel in 1968, serving initially as Executive Vice President. He became President and Chief Executive Officer in 1975 and held that post until elected Chairman and Chief Executive Officer in 1979. He remained CEO until 1987 and was named Chairman Emeritus in 1997.

Moore is widely known for "Moore's Law," in which he predicted that the number of transistors the industry would be able to place on a computer chip would double every couple of years. In 1995, he updated his prediction to once every two years. While originally intended as a rule of thumb in 1965, it has become the guiding principle for the industry to deliver ever-more-powerful semiconductor chips at proportionate decreases in cost.

Moore earned a B.S. in Chemistry from the University of California at Berkeley and a Ph.D. in Chemistry and Physics from the California Institute of Technology. He was born in San Francisco, Calif., on Jan. 3, 1929.

He is a director of Gilead Sciences Inc., a member of the National Academy of Engineering, and a Fellow of the IEEE. Moore also serves on the Board of Trustees of the California Institute of Technology. He received the National Medal of Technology from President George Bush in 1990.

The SIA was pleased to honor Dr. Gordon E. Moore with its first-ever SIA Lifetime Achievement Award in November 2002.

Most semiconductor companies use what is called a 4-4-5 calendar. In terms of months out of the year, there are four weeks in the first two months of the quarter and five in the third. The SIA uses a three-month moving average as a "smoothing technique" to avoid confusion when looking at the data in terms of single months, which makes the data look distorted with huge drop-offs in sales during the first month of the quarter and sales spiking back up in the third month.

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